1. Field
Aspects of the present disclosure relate generally to switching techniques in network communication systems, and more particularly to a system and method of processing management frames to support an interface between a generic network device and a distributed switching architecture enabled switch.
2. Background
Recently, the Ethernet passive optical network (EPON) market has been experiencing growth and development. Several networking equipment manufacturers and network managers have sought to create or to enable architectures in which an EPON physical layer device (PHY) is coupled to an Ethernet switch device which may be a distributed switching architecture (DSA) enabled switch. In some network infrastructure arrangements, it may be desirable to employ a gigabit Ethernet (GE) link operating at one gigabit per second (Gbit), such as a gigabit media independent interface (GMII), for instance, between an EPON device and a switch. In use, the switch may provide a GE link allowing the EPON device to access a local area network (LAN) via a serializer/deserializer (SerDes) device, an access control server (such as a 1111 device marketed by Cisco Systems), or some other network component. Additionally or alternatively, the switch may provide the EPON device access to the LAN via one or more fast Ethernet (FE) links operating at 100 megabits per second (Mbit) or faster.
As is known in the art, a typical EPON PHY device may contain a relatively low bandwidth microprocessor or microcontroller (such as an 8051-style central processing unit (CPU) marketed by Intel Corporation, for instance) that generally cannot reliably process data at GE or FE data rates. Nevertheless, it may be desirable in some situations to run Spanning Tree protocols on such a CPU. In accordance with the switching techniques employed at a DSA switch, data frames handled by the switch must be DSA Tagged. However, network frames in general, though using the same paths as the DSA Tagged frames, cannot be DSA Tagged since a generic network hardware device may not know how to convert a DSA Forward (i.e., a data frame, as opposed to a management frame) into a generic network frame. This is true even with respect to routing devices that use sophisticated microprocessor components capable of high speed, high bandwidth data processing. Any Spanning Tree control frame destined to or egressing from the management CPU must generally contain additional information about the physical source or destination port. With respect to a DSA enabled switch, data identifying these ports are placed in the DSA Tag. If the same path to the management CPU is also used for normal, non-control, frames, then it is generally desirable that these normal frames remain in a normal frame format so that the CPU does not have to convert each and every frame. This is true even if the control frames use some other format different from that employed by a DSA enabled switch.
Hence, it would be desirable to provide a method and system facilitating an interface between a generic device and a DSA enabled or other switch to enable construction and detection of control frames, while at the same time leaving normal network frames unmodified.